In general, a plurality of delay taps are cascade-coupled in an adaptive equalizer. A calculation coefficient is set in each of the delay taps. In the above-described configuration, equalization error generated by channel loss or the like may be reduced by updating the calculation coefficient. However, for a conventional adaptive equalizer, the number of delay taps is preferably designed according to the maximum channel loss. Due to this, power consumption may not be reduced. There is a disclosed technique that an equalizer of a data reception device reduces the total number of taps by distributing the optimum number of taps for each burst (see, for example, Japanese Laid-open Patent Publication No. 05-75393).
However, the equalizer according to this technique does not reduce the total number of taps based on error detection, so that equalization accuracy may not be maintained.